A Low-Power and SEU-Tolerant Switch Architecture for Network on Chips.
Ahmad PatooghyMahdi FazeliSeyed Ghassem MiremadiPublished in: PRDC (2007)
Keyphrases
- low power
- high speed
- vlsi architecture
- power consumption
- network architecture
- low cost
- real time
- single chip
- cmos technology
- high power
- mixed signal
- packet switching
- wireless transmission
- low power consumption
- vlsi circuits
- data flow
- nm technology
- logic circuits
- communication networks
- network structure
- power saving
- communication protocol
- delay insensitive
- peer to peer
- wireless sensor networks
- design considerations
- functional units
- cmos image sensor
- image processing