Design and Implementation of Low-Area and Low-Power AES Encryption Hardware Core.
Panu HämäläinenTimo AlhoMarko HännikäinenTimo D. HämäläinenPublished in: DSD (2006)
Keyphrases
- low power
- low power consumption
- vlsi architecture
- low cost
- single chip
- power consumption
- cmos technology
- high speed
- advanced encryption standard
- vlsi implementation
- digital signal processing
- gate array
- signal processor
- logic circuits
- real time
- ultra low power
- hardware architecture
- circuit design
- power dissipation
- power reduction
- hardware and software
- secret key
- low complexity
- encryption algorithms
- mixed signal
- high power
- hardware implementation
- digital camera
- image sensor
- design methodology
- wireless transmission
- cryptographic algorithms
- cmos image sensor
- field programmable gate array