Parameterized circuit complexity of model-checking on sparse structures.
Michal PilipczukSebastian SiebertzSzymon TorunczykPublished in: LICS (2018)
Keyphrases
- model checking
- pspace complete
- temporal logic
- temporal properties
- formal verification
- automated verification
- model checker
- finite state
- formal specification
- partial order reduction
- verification method
- computation tree logic
- transition systems
- finite state machines
- symbolic model checking
- timed automata
- bounded model checking
- reachability analysis
- asynchronous circuits
- concurrent systems
- process algebra
- deterministic finite automaton
- epistemic logic
- np complete
- artificial intelligence
- formal methods
- linear temporal logic
- modal logic
- computational complexity
- satisfiability problem
- decision problems
- knowledge representation
- knowledge base