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A 14GHz Cascade Differential-Capacitor-Based DCO with Resistor-Biased Buffer.

Dong YanchiWeixin GaiXiao XiangHaowei Niu
Published in: ISCAS (2021)
Keyphrases
  • transmission line
  • short circuit
  • high speed
  • power supply
  • data sets
  • high quality
  • clock frequency
  • buffer allocation
  • intel xeon
  • multiresolution
  • power consumption
  • frequency band
  • buffer size