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Explicit reservation of cache memory in a predictable, preemptive multitasking real-time system.
Jack Whitham
Neil C. Audsley
Robert I. Davis
Published in:
ACM Trans. Embed. Comput. Syst. (2014)
Keyphrases
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real time
main memory
limited memory
memory hierarchy
lower bound
cache conscious
memory subsystem
scheduling problem
data access
computing power
vision system
low cost
cache misses
embedded processors
control system
memory access
virtual memory