CMOS Transistor Sizing for Minimization of Energy-Delay Product.
Christophe TretzCharles A. ZukowskiPublished in: Great Lakes Symposium on VLSI (1996)
Keyphrases
- power dissipation
- high speed
- power consumption
- low power
- energy efficiency
- ultra low power
- energy saving
- circuit design
- low cost
- energy consumption
- cmos technology
- vlsi circuits
- battery powered
- integrated circuit
- neural network
- power supply
- low energy
- digital signal processing
- objective function
- energy minimization
- delay insensitive
- single chip
- product information
- total energy
- low voltage
- production planning
- energy efficient
- analog vlsi
- finite state machines
- equivalent circuit
- life cycle