High Performance Single Chip Implementation for a Digital Protective Relay Using FPGA.

Jong Kang Park Jong Tae Kim Myung Chul Shin

Published in: ESA/VLSI (2004)

Keyphrases

single chip
signal processor
highly parallel
cmos image sensor
software implementation
low power
embedded processors
low cost
low power consumption
power consumption
image sensor
video camera
real time
high speed
image processing algorithms