A multi-FPGA application-specific architecture for accelerating a floating point Fourier Integral Operator.
Jason LeeLesley ShannonMatthew J. YedlinGary F. MargravePublished in: ASAP (2008)
Keyphrases
- application specific
- instruction set
- floating point
- floating point arithmetic
- general purpose
- computation intensive
- low power consumption
- level parallelism
- fast fourier transform
- dynamic reconfiguration
- fixed point
- low cost
- fourier transform
- hardware implementation
- signal processing
- hardware architecture
- high speed
- database
- data integration
- hardware design
- grid computing
- frequency domain