Using NoC routers as processing elements.
Sílvio R. F. de FernandesBruno Cruz de OliveiraIvan Saraiva SilvaPublished in: SBCCI (2009)
Keyphrases
- processing elements
- massively parallel
- linear array
- random access
- parallel processors
- image processing algorithms
- end to end
- associative memory
- hardware architecture
- hardware implementation
- load balancing
- parallel computers
- routing algorithm
- parallel architectures
- high speed
- parallel architecture
- network traffic
- functional units
- computer vision
- intrusion detection
- field programmable gate array
- quality of service
- neural network