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Cracking the DES Cipher with Cost-Optimized FPGA Devices.
Jaroslaw Sugier
Published in:
DepCoS-RELCOMEX (2019)
Keyphrases
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mobile devices
low cost
high speed
hardware design
real time
field programmable gate array
embedded systems
hardware implementation
total cost
high cost
expected cost
parallel hardware
cost sensitive
signal processing
hardware architecture
real time image processing
low power consumption
neural network