High-Speed 32*32 bit Multiplier in 0.18um CMOS Process.

Ebrahim Hosseini Morteza Mousazadeh Abdollah Amini

Published in: MIXDES (2018)

Keyphrases

high speed
shift register
low power
floating point
hardware implementation
high speed networks
bit vector
search engine
multiscale
optimal solution
real time
frame rate
database
databases
image sequences
multi agent
digital images
bit vectors