A Four-Phase Passive Mixer-First Receiver With a Low-Power Complementary Common-Gate TIA.
Indrajit DasNagarjuna NallamPublished in: IEEE Access (2020)
Keyphrases
- low power
- cmos technology
- power consumption
- low cost
- high speed
- nm technology
- single chip
- high power
- metal oxide semiconductor
- logic circuits
- vlsi architecture
- low power consumption
- digital signal processing
- low voltage
- rfid reader
- vlsi circuits
- wireless transmission
- gate array
- power saving
- mixed signal
- delay insensitive