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Structured Weight Matrices-Based Hardware Accelerators in Deep Neural Networks: FPGAs and ASICs.
Caiwen Ding
Ao Ren
Geng Yuan
Xiaolong Ma
Jiayu Li
Ning Liu
Bo Yuan
Yanzhi Wang
Published in:
CoRR (2018)
Keyphrases
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neural network
weight matrices
field programmable gate array
weight matrix
embedded systems
pattern recognition
application specific integrated circuits
hardware implementation
parallel computing
physical design
general purpose processors
computer vision
state space
computing systems
image processing algorithms