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Low Power and Storage Efficient Parallel Lookup Engine Architecture for IP Packets.
Alireza Mahini
Reza Berangi
Hossein Mohtashami
Hamidreza Mahini
Published in:
CSICC (2008)
Keyphrases
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low power
low cost
power consumption
vlsi architecture
high speed
ip address
cmos technology
single chip
mixed signal
signal processor
ip networks
digital signal processing
high power
vlsi circuits
real time
low power consumption
data storage
file system
parallel processing
low complexity
nm technology