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A Conflict-free Scheduler for High-performance Graph Processing on Multi-pipeline FPGAs.
Qinggang Wang
Long Zheng
Jieshan Zhao
Xiaofei Liao
Hai Jin
Jingling Xue
Published in:
ACM Trans. Archit. Code Optim. (2020)
Keyphrases
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conflict free
processing pipeline
random walk
functional dependencies
decision making
directed graph
scheduling algorithm
database
artificial intelligence
bayesian networks
low cost
graph structure
parallel architecture
database schemes
hardware software
reconfigurable hardware