An Efficient and Scalable Sparse Polynomial Multiplication Accelerator for LAC on FPGA.
Jipeng ZhangZhe LiuHao YangJunhao HuangWeibin WuPublished in: ICPADS (2020)
Keyphrases
- field programmable gate array
- hardware implementation
- high dimensional
- memory efficient
- polynomial delay
- real time
- real time image processing
- sparse data
- high speed
- parallel computing
- floating point
- random projections
- sparse coding
- web scale
- fpga implementation
- image processing algorithms
- sparse representation
- lightweight
- signal processing