A high-speed, low-power interleaved trace-back memory for Viterbi decoder.
Pasin IsrasenaIzzet KalePublished in: ISCAS (2006)
Keyphrases
- low power
- high speed
- noisy channel
- low cost
- power consumption
- power dissipation
- single chip
- high power
- hidden markov models
- digital signal processing
- low complexity
- decoding algorithm
- random access
- real time
- error concealment
- logic circuits
- wireless transmission
- cmos technology
- vlsi architecture
- frame rate
- low power consumption
- video codec
- power reduction
- vlsi circuits
- signal processor
- distributed video coding