Login / Signup
A 40-nm 8T SRAM with selective source line control of read bitlines and address preset structure.
Shusuke Yoshimoto
Shinji Miyano
Makoto Takamiya
Hirofumi Shinohara
Hiroshi Kawaguchi
Masahiko Yoshimoto
Published in:
CICC (2013)
Keyphrases
</>
control system
power consumption
control strategy
low power
control method
geometric structure
database
databases
neural network
case study
image sequences
line segments
hierarchical structure
graph structure