A Digital 60 Channel Transmultiplexer: Algorithm Minimizing Multiplication Rate and Hardware Implementation.
Fumio TakahataKazunori InagakiYasuo HirataAkira OgawaPublished in: IEEE Trans. Commun. (1982)
Keyphrases
- hardware implementation
- learning algorithm
- k means
- software implementation
- computational complexity
- fpga implementation
- objective function
- optimal solution
- tree structure
- estimation algorithm
- parallel implementation
- efficient implementation
- fractal encoding
- image binarization
- hardware architecture
- general purpose
- data streams
- image processing