A low-power DCT IP core based on 2D algebraic integer encoding.
Minyi FuGraham A. JullienVassil S. DimitrovMajid AhmadiPublished in: ISCAS (2) (2004)
Keyphrases
- low power
- power consumption
- low cost
- high speed
- single chip
- high power
- discrete cosine transform
- transform domain
- digital signal processing
- low power consumption
- low density parity check
- logic circuits
- vlsi architecture
- spatial domain
- image compression
- wireless transmission
- vlsi circuits
- video coder
- power reduction
- image sensor
- embedded systems
- signal processing