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An RRAM-Based Digital Computing-in-Memory Macro With Dynamic Voltage Sense Amplifier and Sparse-Aware Approximate Adder Tree.

Yifan HeJinshan YueXiaoyu FengYuxuan HuangHongyang JiaJingyu WangLu ZhangWenyu SunHuazhong YangYongpan Liu
Published in: IEEE Trans. Circuits Syst. II Express Briefs (2023)
Keyphrases
  • memory usage
  • power system
  • pattern matching
  • sparse data
  • memory size
  • decision trees
  • high dimensional
  • low cost
  • high speed
  • memory requirements
  • efficient computation
  • tree structures