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Checkpoint aware hybrid cache architecture for NV processor in energy harvesting powered systems.
Mimi Xie
Mengying Zhao
Chen Pan
Hehe Li
Yongpan Liu
Youtao Zhang
Chun Jason Xue
Jingtong Hu
Published in:
CODES+ISSS (2016)
Keyphrases
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management system
high speed
energy consumption
instruction set
real time
expert systems
computer systems
data access
application level
high end
multithreading
memory access