Low Power Microarchitecture Designs of ACS Block in Viterbi Decoder: A Review.
Asmaa MosbehAli A. Y. IbraheemHassan MostafaKhalil YousefPublished in: ICICM (2023)
Keyphrases
- low power
- power consumption
- low cost
- high speed
- nm technology
- noisy channel
- low density parity check
- hidden markov models
- digital signal processing
- decoding algorithm
- single chip
- logic circuits
- low complexity
- block size
- low power consumption
- vlsi circuits
- vlsi architecture
- ldpc codes
- power reduction
- image sensor
- power dissipation
- error concealment
- gate array
- real time
- error correction