Optimized Design of Interconnected Bus on Chip for Low Power.
Donghai LiGuang-Sheng MaGang FengPublished in: International Conference on Computational Science (4) (2006)
Keyphrases
- low power
- high speed
- single chip
- low power consumption
- low cost
- cmos technology
- power consumption
- power dissipation
- mixed signal
- logic circuits
- nm technology
- vlsi architecture
- digital signal processing
- high power
- gate array
- image sensor
- cmos image sensor
- power reduction
- ultra low power
- wireless transmission
- vlsi circuits
- real time
- signal processor
- design process
- power management
- processing capabilities
- design methodology
- data storage