A Novel Cost-Effective and Programmable VLSI Architecture of CAVLC Decoder for H.264/AVC.
Yanmei QuYun HeShunliang MeiPublished in: J. Signal Process. Syst. (2008)
Keyphrases
- cost effective
- vlsi architecture
- low complexity
- low cost
- video coding standard
- mode decision
- low power
- video codec
- video coding
- variable length coding
- bit rate
- decoding process
- distributed video coding
- motion estimation
- error resilient
- coding method
- motion compensation
- rate distortion
- real time
- vlsi implementation
- cost effectiveness
- computational complexity
- motion vectors
- coding scheme
- video compression
- coding efficiency
- intra prediction
- macroblock
- digital video
- low density parity check
- bitstream
- wyner ziv
- video streaming
- motion compensated
- bit plane
- compressed video
- rate allocation
- error resilience
- error concealment
- block size
- entropy coding
- low bit rate
- scalable video coding
- transform domain
- video transmission
- video quality
- image coding