Poster: Design consideration of 60 GHz low power low-noise amplifier in 65 nm CMOS.
Zhe ChenHao GaoRainier van DommeleDusan M. MilosevicPeter G. M. BaltusPublished in: SCVT (2016)
Keyphrases
- low power
- cmos technology
- high speed
- low power consumption
- power consumption
- single chip
- nm technology
- low cost
- high power
- power dissipation
- mixed signal
- vlsi architecture
- logic circuits
- digital signal processing
- power reduction
- gate array
- low voltage
- vlsi circuits
- cmos image sensor
- ultra low power
- power saving
- delay insensitive
- wireless transmission
- wide dynamic range
- design process
- silicon on insulator
- real time
- dynamic range