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Clock gating and multi-VTH low power design methods based on 32/28 nm ORCA processor.
Vazgen Melikyan
Eduard Babayan
Anush Melikyan
Davit Babayan
Poghos Petrosyan
Edvard Mkrtchyan
Published in:
EWDTS (2015)
Keyphrases
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low power
power consumption
single chip
power reduction
high speed
low cost
power dissipation
general purpose
nm technology
clock gating
cmos technology
gate array
vlsi architecture
logic circuits
digital signal processing
embedded systems
pattern recognition