A Pipelined Fast 2D-DCT Accelerator for FPGA-based SoCs.
Antonino TumeoMatteo MonchieroGianluca PalermoFabrizio FerrandiDonatella SciutoPublished in: ISVLSI (2007)
Keyphrases
- field programmable gate array
- hardware implementation
- discrete cosine transform
- video compression
- parallel computing
- hardware design
- parallel implementation
- video communication
- embedded systems
- application specific
- data flow
- image processing algorithms
- hardware architecture
- computing systems
- video processing
- video data
- database
- hardware software partitioning
- parallel architecture
- compute intensive
- hardware architectures
- massively parallel
- general purpose
- data structure
- multimedia
- neural network