VLSI Hardware Architecture of Stochastic Low-rank Tensor Decomposition.
Lingyi HuangChunhua DengShahana IbrahimXiao FuBo YuanPublished in: ACSCC (2021)
Keyphrases
- tensor decomposition
- low rank
- hardware architecture
- hardware implementation
- linear combination
- convex optimization
- high order
- matrix factorization
- missing data
- singular value decomposition
- matrix completion
- low rank matrix
- signal processing
- semi supervised
- high dimensional data
- data representation
- auxiliary information
- singular values
- tensor factorization
- rank minimization
- associative memory
- field programmable gate array
- image segmentation
- missing values
- probabilistic model
- active learning