A single-chip low power DSP/RISC CPU with 0.25 μm CMOS technology.
Takashi ShikataShinya KondouMasanori NoseYoshio KuniyasuMutsuhiro NaitohHidetaka SuzukiPublished in: CICC (1998)
Keyphrases
- low power
- single chip
- low power consumption
- cmos technology
- digital signal processing
- high speed
- low cost
- power consumption
- low voltage
- cmos image sensor
- mixed signal
- image sensor
- signal processor
- computer vision
- power dissipation
- optical flow
- field programmable gate array
- image quality
- signal processing
- markov random field
- general purpose
- digital images