A Programmable and Highly Pipelined PPP Architecture for Gigabit IP over SDH/SONET.
Ciaran ToalSakir SezerPublished in: IPDPS (2003)
Keyphrases
- single chip
- data aggregation
- signal processor
- parallel architecture
- data flow
- low cost
- low power
- real time
- processor array
- management system
- hardware implementation
- network architecture
- digital signal processors
- layered architecture
- hardware architecture
- architectural design
- image sensor
- software architecture
- cloud computing
- multimedia
- data sets