Dynamically reconfigurable register file for a softcore VLIW processor.
Stephan WongFakhar AnjamFaisal NadeemPublished in: DATE (2010)
Keyphrases
- hardware architecture
- field programmable gate array
- level parallelism
- hardware implementation
- high speed
- instruction set
- embedded systems
- high end
- database
- single chip
- file system
- file formats
- multiprocessor systems
- parallel architecture
- parallel architectures
- associative memory
- pattern recognition
- parallel processing
- single processor
- read write
- open source
- computer systems
- software systems
- computer vision
- memory management
- graphical models
- real time