Low power digital signal processing scheme via stochastic logic protection.
Jienan ChenJianhao HuShuyang LiPublished in: ISCAS (2012)
Keyphrases
- low power
- digital signal processing
- logic circuits
- power consumption
- low cost
- high speed
- delay insensitive
- single chip
- vlsi architecture
- data flow
- vlsi circuits
- image sensor
- power dissipation
- signal processing
- medical images
- low power consumption
- general purpose
- information security
- parallel algorithm
- software systems
- cmos technology
- image segmentation