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Scaling ferroelectric HZO thickness for low power Ge MFS-FTJ memories.
Nikitas Siannas
Christina Zacharaki
Polychronis Tsipas
Stefanos Chaitoglou
Laura Bégon-Lours
Athanasios Dimoulas
Published in:
ESSDERC (2021)
Keyphrases
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low power
power consumption
high speed
low cost
high power
single chip
wireless transmission
low power consumption
digital signal processing
vlsi architecture
vlsi circuits
logic circuits
wireless sensor networks
power reduction
gate array
delay insensitive
mixed signal
image sensor
associative memory
general purpose