Multi-match packet classification on memory-logic trade-off FPGA-based architecture.
Carlos A. ZerbiniJorge M. FinochiettoPublished in: HPSR (2013)
Keyphrases
- trade off
- pattern recognition
- decision trees
- feature extraction
- classification algorithm
- support vector machine svm
- support vector
- text classification
- machine learning
- classification scheme
- classification accuracy
- classification method
- image classification
- hardware architecture
- real time
- logic programming
- high speed
- support vector machine
- feature vectors
- feature space