A high-performance hardware implementation of the H.264 simplified 8×8 transformation and quantization [video coding].
Ihab AmerWael M. BadawyGraham A. JullienPublished in: ICASSP (2) (2005)
Keyphrases
- hardware implementation
- video coding
- motion estimation
- bit rate
- motion compensated
- video compression
- motion compensation
- rate distortion
- efficient compression
- video quality
- signal processing
- efficient implementation
- motion vectors
- video codec
- image processing algorithms
- tree structured vector quantization
- field programmable gate array
- rate control
- video coder
- hardware architecture
- optical flow
- error resilience
- video encoder
- inter frame
- low bit rate
- bit allocation
- quantization parameter
- low complexity
- feature extraction
- video coding standard
- image sequences
- multimedia