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Power Optimization of an 11.75-Gb/s Combined Decision Feedback Equalizer and Clock Data Recovery Circuit in 0.18-μm CMOS.

Lijun LiMichael M. Green
Published in: IEEE Trans. Circuits Syst. I Regul. Pap. (2011)
Keyphrases
  • high speed
  • power consumption
  • image data
  • data quality
  • computer simulation
  • decision feedback
  • image sequences
  • computer systems
  • end to end