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A 2.4GHz WLAN transceiver with fully-integrated highly-linear 1.8V 28.4dBm PA, 34dBm T/R switch, 240MS/s DAC, 320MS/s ADC, and DPLL in 32nm SoC CMOS.

Yulin TanJon DusterChang-Tsung FuErkan AlpmanAjay BalankuttyChun C. LeeAshoke RaviStefano PelleranoKailash ChandrashekarHyung Seok KimBrent R. CarltonSatoshi SuzukiM. ShafiYorgos PalaskasHasnain Lakdawala
Published in: VLSIC (2012)
Keyphrases
  • fully integrated
  • high speed
  • low power
  • databases
  • power consumption
  • wireless networks
  • image sensor
  • first order logic