Massively parallel implementation of cyclic LDPC codes on a general purpose graphics processing unit.
Hyunwoo JiJunho ChoWonyong SungPublished in: SiPS (2009)
Keyphrases
- graphics processing units
- massively parallel
- general purpose
- parallel computing
- ldpc codes
- gpu implementation
- high performance computing
- parallel architectures
- parallel computers
- parallel computation
- compute unified device architecture
- fine grained
- parallel programming
- commodity hardware
- error correction
- parallel implementation
- efficient implementation
- parallel processing
- special case
- real time
- message passing
- decoding algorithm
- video sequences
- message passing interface
- image segmentation