Scalable VLSI Architecture for Hadamard Transforms of HEVC/H.265 Video Coding Standard.
Karam SinghShaik Rafi AhamedPublished in: VDAT (2020)
Keyphrases
- video coding standard
- vlsi architecture
- mode decision
- low complexity
- video coding
- scalable video coding
- coding method
- intra prediction
- coding efficiency
- motion compensation
- motion vectors
- video compression
- video codec
- block size
- motion compensated
- motion estimation
- macroblock
- vlsi implementation
- digital video
- discrete cosine transform
- bit rate
- low power
- rate distortion
- real time
- inter frame
- image coding
- video quality
- computational complexity
- error propagation
- distributed video coding
- image compression
- multiview video coding
- reference frame
- coding scheme
- low bit rate
- prediction error
- compression ratio
- power consumption
- bit plane
- transform domain
- bitstream
- low cost
- video sequences