Hybrid compile and run-time memory management for a 3D-stacked reconfigurable accelerator.
Lovic GauthierShinya UenoKoji InouePublished in: CASES (2013)
Keyphrases
- memory management
- hardware implementation
- field programmable gate array
- compute intensive
- operating system
- garbage collection
- java virtual machine
- parallel computation
- parallel implementation
- efficient implementation
- computing environments
- signal processing
- low cost
- data mining
- general purpose
- graphical models
- knn
- query processing
- image processing