Partially Reconfigurable Cores for Xilinx Virtex.
Matthias DyerChristian PlesslMarco PlatznerPublished in: FPL (2002)
Keyphrases
- xilinx virtex
- hardware implementation
- field programmable gate array
- general purpose processors
- hardware architecture
- parallel computing
- low cost
- embedded systems
- image processing algorithms
- parallel architectures
- efficient implementation
- signal processing
- computing systems
- multi core processors
- parallel architecture
- neural network
- frame rate
- image processing
- computer vision