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Circuit and system design for an 860-960 MHz RFID reader front-ends with Tx leakage suppression in 0.18 - µm CMOS technology.

Javad JavidanSeyed Mojtaba AtarodiHoward C. Luong
Published in: Int. J. Circuit Theory Appl. (2012)
Keyphrases
  • cmos technology
  • low power
  • power consumption
  • power dissipation
  • low voltage
  • parallel processing
  • mixed signal
  • high speed
  • low cost
  • flip flops
  • multiscale
  • design considerations