Low-Power Memory-Reduced Traceback MAP Decoding for Double-Binary Convolutional Turbo Decoder.
Cheng-Hung LinChun-Yu ChenTsung-Han TsaiAn-Yeu WuPublished in: IEEE Trans. Circuits Syst. I Regul. Pap. (2009)
Keyphrases
- low power
- turbo codes
- low density parity check
- decoding algorithm
- power consumption
- low power consumption
- video decoder
- decoding process
- high speed
- low cost
- ldpc codes
- non binary
- error correction
- channel coding
- decision feedback
- distributed video coding
- power dissipation
- single chip
- compressed images
- vlsi architecture
- error propagation
- cmos technology
- logic circuits
- wireless channels
- vlsi circuits
- reed solomon
- rate allocation
- power reduction
- error resilience
- low complexity
- bit plane
- image transmission