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Low-power Scheduling Framework for Heterogeneous Architecture under Performance Constraint.

Junke LiBing GuoYan ShenDeguang Li
Published in: KSII Trans. Internet Inf. Syst. (2020)
Keyphrases
  • low power
  • power consumption
  • low cost
  • high speed
  • vlsi architecture
  • digital signal processing
  • cmos technology
  • real time
  • high power
  • mixed signal
  • delay insensitive