Login / Signup
A 100-MS/s 8-b CMOS subranging ADC with sustained parametric performance from 3.8 V down to 2.2 V.
Robert C. Taft
Maria Rosaria Tursi
Published in:
IEEE J. Solid State Circuits (2001)
Keyphrases
</>
analog to digital converter
low cost
single chip
high speed
circuit design
knowledge building
power consumption
pac man
real time
neural network
low power
power supply
delay insensitive
analog vlsi
image sensor
collaborative learning
parametric representation
random access memory