Formal verification of Full-Wave Rectifier using SPICE circuit simulation traces.

Kusum Lata H. S. Jamadagni

Published in: ISQED (2010)

Keyphrases

formal verification
model checking
single phase
automated verification
bounded model checking
model checker
symbolic model checking
simulation model
temporal logic
output voltage
neural network
matlab simulink
circuit design
numerical simulations
electronic circuits
high speed
expert systems
knowledge base