Design and evaluation of dynamic partial reconfiguration using fault tolerance in asynchronous FPGA.

S. Lekashri P. Sakthivel

Published in: Microprocess. Microsystems (2019)

Keyphrases

fault tolerance
fault tolerant
response time
distributed systems
distributed computing
group communication
load balancing
hardware design
high availability
fault management
data replication
single chip
hardware architecture
single point of failure