A 0.1-1.5G SDR transmitter with two-stage harmonic rejection power mixer in 65-nm CMOS.

Bing Lyu Yun Yin Xiaobao Yu Baoyong Chi

Published in: ASICON (2015)

Keyphrases

power consumption
power supply
silicon on insulator
power quality
nm technology
cmos technology
low power
single phase
ibm power processor
high speed
chip design
power dissipation
low cost
power reduction
power management
circuit design
analog vlsi
active power filter
infrared