Memory-Efficient Accelerating Schedule for LDPC Decoder.
Kazunori ShimizuNozomu TogawaTakeshi IkenagaSatoshi GotoPublished in: APCCAS (2006)
Keyphrases
- memory efficient
- low density parity check
- ldpc codes
- distributed source coding
- turbo codes
- decoding algorithm
- distributed video coding
- error correction
- scheduling problem
- message passing
- compressive sensing
- channel coding
- external memory
- low complexity
- error concealment
- iterative deepening
- rate allocation
- error resilience
- source coding
- physical layer
- image transmission
- random projections
- video compression
- rate distortion
- video coding
- compressed images
- video codec
- error resilient
- noise model
- end to end